Taiwan Semiconductor Manufacturing Co. is developing a rival to Intel’s advanced chip-packaging technology, according to people familiar with the matter, a move that could redraw the battle lines in the AI chip business. The world’s largest contract chipmaker is working with Unimicron, a Taiwanese substrate maker, on a technology similar to Intel’s embedded multi-die interconnect bridge, or EMIB, the people said.
The project is at an early stage, the people said, and TSMC has not confirmed the work publicly. But the direction is clear: TSMC, which dominates the market for making AI chips, does not want to cede the packaging layer of the business to its biggest rival.
Packaging has become one of the most contested corners of the semiconductor industry. As chipmakers hit physical limits in shrinking transistors, they have turned to stacking and connecting multiple chips in tight packages, a technique that lets AI accelerators combine computing cores with the memory and networking they need. The companies that control packaging increasingly control the performance of the final product.
Intel’s EMIB is the technology at the center of the fight. It embeds a small silicon bridge inside the package substrate to connect chips at high speed, a method Intel has used in its own processors and, more importantly, won external customers with. Google is among the companies that have ordered chips built around Intel’s packaging technology, according to people familiar with the arrangements.
TSMC’s answer so far has been its own packaging family, anchored by CoWoS, which stacks memory alongside logic chips. CoWoS capacity has been a bottleneck for two years, with Nvidia and other AI chip designers competing for limited supply, and TSMC has been expanding output to catch up with demand.
The company’s interest in an EMIB-style approach suggests it sees limits in that strategy. CoWoS excels at stacking but is expensive and capacity-constrained, and some customers want a cheaper way to connect chips side by side. An EMIB-like technology would give TSMC a second packaging option and, just as important, prevent Intel from owning the alternative.
The stakes are visible in the order books. AI chip demand has grown so fast that packaging capacity, not wafer production, is now the constraint that determines how many accelerators ship. Whoever controls packaging capacity controls the pace of the AI buildout, and both TSMC and Intel have made it a strategic priority.
Intel has positioned packaging as a way back into the foundry business. The company’s foundry unit, which lost ground to TSMC for decades, has argued that its EMIB and related technologies give customers a reason to choose Intel for at least part of their manufacturing. Winning Google’s business lent credibility to that pitch.
TSMC’s partnership with Unimicron, a company better known for making the substrates that chips sit on, would extend its reach into the materials and assembly side of packaging. Unimicron is one of the largest substrate makers in Asia, and a closer alliance with TSMC would give the two companies a vertically integrated answer to Intel’s in-house packaging capabilities.
Industry analysts said a TSMC packaging technology that competes directly with EMIB would squeeze the pricing and supply of the entire packaging market. More options for customers mean more negotiating power, and the pressure would fall hardest on Intel, whose foundry pitch depends on being the sole source of its proprietary technology.
The technology behind the two approaches differs in execution but not in goal. Intel’s EMIB uses a small silicon bridge embedded in the package to shuttle data between adjacent chips at very high speeds, while TSMC’s CoWoS stacks chips vertically. An EMIB-style option would let TSMC serve customers whose designs favor side-by-side integration, particularly in networking and custom accelerators.
The economics are driving the competition. Packaging has become a growing share of a chip’s total cost, and the companies that control the most efficient packaging win a larger slice of the bill. TSMC’s packaging capacity is sold out, and customers have complained about the cost; a second, cheaper technology would ease both problems.
The implications extend to the foundry war itself. Intel has used its packaging lead to argue that customers should not put all their manufacturing eggs in TSMC’s basket, and Google’s orders gave that argument credibility. If TSMC offers a comparable technology, the differentiation Intel has built around packaging shrinks, leaving the two companies to compete more directly on manufacturing alone.
Neither company commented on the work. For now, the project is another front in a rivalry that spans every layer of the chip business: wafer manufacturing, advanced packaging and the supply chains beneath both. The AI boom has made packaging the industry’s most visible choke point, and neither TSMC nor Intel intends to let the other control it.
