Samsung Electronics has decided to delay adoption of High-NA EUV lithography until 2030, when it plans to use the machines for production at the 1-nanometer node, according to TechPowerUp, a decision that sets the world’s largest memory maker on a different schedule from its two biggest rivals.
The choice is a study in the economics of advanced manufacturing. High-NA EUV machines, built exclusively by ASML, cost more than $400 million each, and their value depends on flawless yields at the most advanced nodes, where a single wafer can be worth tens of thousands of dollars. Samsung has concluded that mastering the current generation of Low-NA EUV tools, the machines that dominate leading-edge production today, will deliver better returns than rushing to the new hardware, the report said. The decision delays Samsung’s High-NA spending by two to three years relative to the aggressive adoption timelines that ASML has pushed for the industry.
The divergence among the three companies that matter is now explicit. Taiwan Semiconductor Manufacturing Co., the world’s largest contract chip maker, plans to bring High-NA tools into production around the end of the decade, pairing them with its most advanced nodes to serve customers who demand the absolute limit of transistor density. Intel, which was the first to install a High-NA system at its Oregon research fab, has positioned the technology as central to its comeback, using it to claim manufacturing leadership in its most advanced processes. Samsung, by contrast, will keep squeezing value out of Low-NA equipment, a decision that saves billions in the short term but carries consequences for the race to the 1-nanometer era.
The stakes are highest in Samsung’s foundry business. The company has watched its share of the contract manufacturing market erode for years, falling behind TSMC as customers from Apple to Nvidia consolidated their orders with the Taiwanese leader. Every new node is a chance to win business back, and every delay in adopting the tools that make new nodes possible narrows that chance. Samsung’s customers, the handful of companies that design the most advanced chips, are already asking how the 2030 timeline affects the company’s 1-nanometer product plans, and the answer, executives said, is that Samsung still expects to be competitive on schedule, just with different tools.
The memory side of the business tells a different story. Samsung, SK Hynix and Micron have been locked in a capital-spending race to produce the high-bandwidth memory that AI accelerators consume by the pallet, and DRAM has become the profit center of the entire semiconductor industry. High-NA EUV matters for DRAM eventually, as memory makers squeeze more density from ever-smaller cells, but the technology’s economics are less urgent there than in logic chips, and Samsung’s decision to delay gives it room to spend on HBM capacity instead. The company is effectively betting that its memory profits, and the demand for AI memory, will matter more than a year or two of foundry bragging rights.
The decision also exposes the changing relationship between ASML and its customers. ASML has spent years telling the industry that High-NA is the only path to continued scaling, and its order book depends on customers accepting that argument. Samsung’s delay is not a cancellation, and the company remains a major ASML customer for Low-NA systems, but it is a signal that the era of unconditional adoption of every new machine generation is over. Customers are now calculating returns on multi-hundred-million-dollar tools with the same discipline they apply to factories, and vendors must sell economics, not just technology.
The wider implication is a slowdown in the rhythm of the advanced-node race. For two decades, the industry scaled on a predictable cadence, a new node every two years, new lithography when physics demanded it. That cadence is now fracturing, with TSMC, Intel and Samsung each choosing different tools, different schedules and different bets on where the industry goes next. The customers who matter, the designers of AI chips and data-center processors, will allocate work based on who delivers, and the divergence gives them more choices and more bargaining power with their suppliers.
For Samsung, the 2030 date is not set in stone. The company has a history of adjusting timelines as technology and markets shift, and a sudden surge in demand for 1-nanometer production could pull High-NA adoption forward. But the direction of the decision is clear: at a time when Samsung is fighting on two fronts, memory and foundry, with capital constrained and margins under pressure, it has chosen to spend its money where the returns are most certain. The advanced-node race will be decided in the early 2030s, and Samsung has decided to arrive on its own schedule, not the industry’s.
